Scaffold peripherals
The FPGA system has many modules wrapping communication peripherals or utility hardware. Each module exposes registers which can be read or written. Each register has a unique address.
Every module has input and output signals. Thoose signals are illustrated in each peripheral documentation like the following example:
Input and output signals can be routed to Scaffold I/Os. Some special output signals have a feedback path and can be routed to other peripheral inputs. Thoose are usually trigger signals and are represented with an extra arrow like the signal output_c in the example above.